Adaptive Complementary Metal-Oxide-Semiconductor Device by Externally Controlled Gate Oxide Thickness

Abstract

Problem statement: Since the advent of IC and VLSI technology, the demand for high-speed devices and equipment is growing very rapidly. Every individual researcher is marching towards the dream of achieving it. The role of a design engineer is becoming more challenging. As per Moore’s law, the packing density doubles every eighteen months. This is possible only by scaling down the device size. This in turn helps in reducing power loss, delay, chip size. In order to achieve high speed switching or frequency the operating voltage as well as threshold voltage must be further reduced which is possible only by downscaling. This scaling down has almost reached its limits, purely because of lack of technology, so further scaling depends on new technology and new material. Rather than waiting for new technology, it would be better to think of changing conventional, single functional NMOS device to a new multifunctional device. Approach: In order to understand the concept behind a multifunctional NMOS device, without affecting the device characteristics, it would be good to simulate and analyze the results with known standard results that are available. This approach helps us to understand the device performance and initiates the method or technology to fabricate multifunctional devices. This study deals with the above aspects to understand the new device and its capabilities. Results: The characteristic of the multifunctional MOS device is obtained by means of a standard simulation tool. The results show that it allows researchers to think of the new technology for fabrication of such devices. Conclusion: If such devices are manufactured at the nano scale, all the above mentioned needs can be met and the researchers can think of new innovative ideas in the area of technology for tomorrow’s need.